
read-write:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400680 <_init>:
  400680:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400684:	910003fd 	mov	x29, sp
  400688:	94000050 	bl	4007c8 <call_weak_fn>
  40068c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400690:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006a0 <.plt>:
  4006a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006a4:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xff50>
  4006a8:	f947fe11 	ldr	x17, [x16, #4088]
  4006ac:	913fe210 	add	x16, x16, #0xff8
  4006b0:	d61f0220 	br	x17
  4006b4:	d503201f 	nop
  4006b8:	d503201f 	nop
  4006bc:	d503201f 	nop

00000000004006c0 <perror@plt>:
  4006c0:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  4006c4:	f9400211 	ldr	x17, [x16]
  4006c8:	91000210 	add	x16, x16, #0x0
  4006cc:	d61f0220 	br	x17

00000000004006d0 <open@plt>:
  4006d0:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  4006d4:	f9400611 	ldr	x17, [x16, #8]
  4006d8:	91002210 	add	x16, x16, #0x8
  4006dc:	d61f0220 	br	x17

00000000004006e0 <__libc_start_main@plt>:
  4006e0:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  4006e4:	f9400a11 	ldr	x17, [x16, #16]
  4006e8:	91004210 	add	x16, x16, #0x10
  4006ec:	d61f0220 	br	x17

00000000004006f0 <close@plt>:
  4006f0:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  4006f4:	f9400e11 	ldr	x17, [x16, #24]
  4006f8:	91006210 	add	x16, x16, #0x18
  4006fc:	d61f0220 	br	x17

0000000000400700 <bzero@plt>:
  400700:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400704:	f9401211 	ldr	x17, [x16, #32]
  400708:	91008210 	add	x16, x16, #0x20
  40070c:	d61f0220 	br	x17

0000000000400710 <__gmon_start__@plt>:
  400710:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400714:	f9401611 	ldr	x17, [x16, #40]
  400718:	9100a210 	add	x16, x16, #0x28
  40071c:	d61f0220 	br	x17

0000000000400720 <write@plt>:
  400720:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400724:	f9401a11 	ldr	x17, [x16, #48]
  400728:	9100c210 	add	x16, x16, #0x30
  40072c:	d61f0220 	br	x17

0000000000400730 <abort@plt>:
  400730:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400734:	f9401e11 	ldr	x17, [x16, #56]
  400738:	9100e210 	add	x16, x16, #0x38
  40073c:	d61f0220 	br	x17

0000000000400740 <memcmp@plt>:
  400740:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400744:	f9402211 	ldr	x17, [x16, #64]
  400748:	91010210 	add	x16, x16, #0x40
  40074c:	d61f0220 	br	x17

0000000000400750 <read@plt>:
  400750:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400754:	f9402611 	ldr	x17, [x16, #72]
  400758:	91012210 	add	x16, x16, #0x48
  40075c:	d61f0220 	br	x17

0000000000400760 <printf@plt>:
  400760:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400764:	f9402a11 	ldr	x17, [x16, #80]
  400768:	91014210 	add	x16, x16, #0x50
  40076c:	d61f0220 	br	x17

0000000000400770 <ioctl@plt>:
  400770:	d0000090 	adrp	x16, 412000 <perror@GLIBC_2.17>
  400774:	f9402e11 	ldr	x17, [x16, #88]
  400778:	91016210 	add	x16, x16, #0x58
  40077c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400780 <_start>:
  400780:	d280001d 	mov	x29, #0x0                   	// #0
  400784:	d280001e 	mov	x30, #0x0                   	// #0
  400788:	aa0003e5 	mov	x5, x0
  40078c:	f94003e1 	ldr	x1, [sp]
  400790:	910023e2 	add	x2, sp, #0x8
  400794:	910003e6 	mov	x6, sp
  400798:	580000c0 	ldr	x0, 4007b0 <_start+0x30>
  40079c:	580000e3 	ldr	x3, 4007b8 <_start+0x38>
  4007a0:	58000104 	ldr	x4, 4007c0 <_start+0x40>
  4007a4:	97ffffcf 	bl	4006e0 <__libc_start_main@plt>
  4007a8:	97ffffe2 	bl	400730 <abort@plt>
  4007ac:	00000000 	.inst	0x00000000 ; undefined
  4007b0:	00400e34 	.word	0x00400e34
  4007b4:	00000000 	.word	0x00000000
  4007b8:	00400e40 	.word	0x00400e40
  4007bc:	00000000 	.word	0x00000000
  4007c0:	00400ec0 	.word	0x00400ec0
  4007c4:	00000000 	.word	0x00000000

00000000004007c8 <call_weak_fn>:
  4007c8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xff50>
  4007cc:	f947f000 	ldr	x0, [x0, #4064]
  4007d0:	b4000040 	cbz	x0, 4007d8 <call_weak_fn+0x10>
  4007d4:	17ffffcf 	b	400710 <__gmon_start__@plt>
  4007d8:	d65f03c0 	ret
  4007dc:	00000000 	.inst	0x00000000 ; undefined

00000000004007e0 <deregister_tm_clones>:
  4007e0:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  4007e4:	91020000 	add	x0, x0, #0x80
  4007e8:	d0000081 	adrp	x1, 412000 <perror@GLIBC_2.17>
  4007ec:	91020021 	add	x1, x1, #0x80
  4007f0:	eb00003f 	cmp	x1, x0
  4007f4:	540000a0 	b.eq	400808 <deregister_tm_clones+0x28>  // b.none
  4007f8:	90000001 	adrp	x1, 400000 <_init-0x680>
  4007fc:	f9477021 	ldr	x1, [x1, #3808]
  400800:	b4000041 	cbz	x1, 400808 <deregister_tm_clones+0x28>
  400804:	d61f0020 	br	x1
  400808:	d65f03c0 	ret
  40080c:	d503201f 	nop

0000000000400810 <register_tm_clones>:
  400810:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400814:	91020000 	add	x0, x0, #0x80
  400818:	d0000081 	adrp	x1, 412000 <perror@GLIBC_2.17>
  40081c:	91020021 	add	x1, x1, #0x80
  400820:	cb000021 	sub	x1, x1, x0
  400824:	9343fc21 	asr	x1, x1, #3
  400828:	8b41fc21 	add	x1, x1, x1, lsr #63
  40082c:	9341fc21 	asr	x1, x1, #1
  400830:	b40000a1 	cbz	x1, 400844 <register_tm_clones+0x34>
  400834:	90000002 	adrp	x2, 400000 <_init-0x680>
  400838:	f9477442 	ldr	x2, [x2, #3816]
  40083c:	b4000042 	cbz	x2, 400844 <register_tm_clones+0x34>
  400840:	d61f0040 	br	x2
  400844:	d65f03c0 	ret

0000000000400848 <__do_global_dtors_aux>:
  400848:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40084c:	910003fd 	mov	x29, sp
  400850:	f9000bf3 	str	x19, [sp, #16]
  400854:	d0000093 	adrp	x19, 412000 <perror@GLIBC_2.17>
  400858:	39420260 	ldrb	w0, [x19, #128]
  40085c:	35000080 	cbnz	w0, 40086c <__do_global_dtors_aux+0x24>
  400860:	97ffffe0 	bl	4007e0 <deregister_tm_clones>
  400864:	52800020 	mov	w0, #0x1                   	// #1
  400868:	39020260 	strb	w0, [x19, #128]
  40086c:	f9400bf3 	ldr	x19, [sp, #16]
  400870:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400874:	d65f03c0 	ret

0000000000400878 <frame_dummy>:
  400878:	17ffffe6 	b	400810 <register_tm_clones>

000000000040087c <pabort>:
  40087c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400880:	910003fd 	mov	x29, sp
  400884:	f9000fa0 	str	x0, [x29, #24]
  400888:	f9400fa0 	ldr	x0, [x29, #24]
  40088c:	97ffff8d 	bl	4006c0 <perror@plt>
  400890:	97ffffa8 	bl	400730 <abort@plt>

0000000000400894 <SPI_Transfer>:
  400894:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  400898:	910003fd 	mov	x29, sp
  40089c:	f90017a0 	str	x0, [x29, #40]
  4008a0:	f90013a1 	str	x1, [x29, #32]
  4008a4:	b9001fa2 	str	w2, [x29, #28]
  4008a8:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  4008ac:	91022000 	add	x0, x0, #0x88
  4008b0:	b9400000 	ldr	w0, [x0]
  4008b4:	b9005fa0 	str	w0, [x29, #92]
  4008b8:	a903ffbf 	stp	xzr, xzr, [x29, #56]
  4008bc:	a904ffbf 	stp	xzr, xzr, [x29, #72]
  4008c0:	f94017a0 	ldr	x0, [x29, #40]
  4008c4:	f9001fa0 	str	x0, [x29, #56]
  4008c8:	f94013a0 	ldr	x0, [x29, #32]
  4008cc:	f90023a0 	str	x0, [x29, #64]
  4008d0:	b9401fa0 	ldr	w0, [x29, #28]
  4008d4:	b9004ba0 	str	w0, [x29, #72]
  4008d8:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  4008dc:	91021800 	add	x0, x0, #0x86
  4008e0:	79400000 	ldrh	w0, [x0]
  4008e4:	7900a3a0 	strh	w0, [x29, #80]
  4008e8:	9100e3a0 	add	x0, x29, #0x38
  4008ec:	aa0003e2 	mov	x2, x0
  4008f0:	d28d6001 	mov	x1, #0x6b00                	// #27392
  4008f4:	f2a80401 	movk	x1, #0x4020, lsl #16
  4008f8:	b9405fa0 	ldr	w0, [x29, #92]
  4008fc:	97ffff9d 	bl	400770 <ioctl@plt>
  400900:	b9005ba0 	str	w0, [x29, #88]
  400904:	b9405ba0 	ldr	w0, [x29, #88]
  400908:	7100001f 	cmp	w0, #0x0
  40090c:	5400008c 	b.gt	40091c <SPI_Transfer+0x88>
  400910:	90000000 	adrp	x0, 400000 <_init-0x680>
  400914:	913c0000 	add	x0, x0, #0xf00
  400918:	97ffff92 	bl	400760 <printf@plt>
  40091c:	b9405ba0 	ldr	w0, [x29, #88]
  400920:	a8c67bfd 	ldp	x29, x30, [sp], #96
  400924:	d65f03c0 	ret

0000000000400928 <SPI_Write>:
  400928:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40092c:	910003fd 	mov	x29, sp
  400930:	f9000fa0 	str	x0, [x29, #24]
  400934:	b90017a1 	str	w1, [x29, #20]
  400938:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  40093c:	91022000 	add	x0, x0, #0x88
  400940:	b9400000 	ldr	w0, [x0]
  400944:	b9002fa0 	str	w0, [x29, #44]
  400948:	b98017a0 	ldrsw	x0, [x29, #20]
  40094c:	aa0003e2 	mov	x2, x0
  400950:	f9400fa1 	ldr	x1, [x29, #24]
  400954:	b9402fa0 	ldr	w0, [x29, #44]
  400958:	97ffff72 	bl	400720 <write@plt>
  40095c:	b9002ba0 	str	w0, [x29, #40]
  400960:	b9402ba0 	ldr	w0, [x29, #40]
  400964:	7100001f 	cmp	w0, #0x0
  400968:	5400008a 	b.ge	400978 <SPI_Write+0x50>  // b.tcont
  40096c:	90000000 	adrp	x0, 400000 <_init-0x680>
  400970:	913c6000 	add	x0, x0, #0xf18
  400974:	97ffff7b 	bl	400760 <printf@plt>
  400978:	b9402ba0 	ldr	w0, [x29, #40]
  40097c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400980:	d65f03c0 	ret

0000000000400984 <SPI_Read>:
  400984:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400988:	910003fd 	mov	x29, sp
  40098c:	f9000fa0 	str	x0, [x29, #24]
  400990:	b90017a1 	str	w1, [x29, #20]
  400994:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400998:	91022000 	add	x0, x0, #0x88
  40099c:	b9400000 	ldr	w0, [x0]
  4009a0:	b9002fa0 	str	w0, [x29, #44]
  4009a4:	b98017a0 	ldrsw	x0, [x29, #20]
  4009a8:	aa0003e2 	mov	x2, x0
  4009ac:	f9400fa1 	ldr	x1, [x29, #24]
  4009b0:	b9402fa0 	ldr	w0, [x29, #44]
  4009b4:	97ffff67 	bl	400750 <read@plt>
  4009b8:	b9002ba0 	str	w0, [x29, #40]
  4009bc:	b9402ba0 	ldr	w0, [x29, #40]
  4009c0:	7100001f 	cmp	w0, #0x0
  4009c4:	5400008a 	b.ge	4009d4 <SPI_Read+0x50>  // b.tcont
  4009c8:	90000000 	adrp	x0, 400000 <_init-0x680>
  4009cc:	913cc000 	add	x0, x0, #0xf30
  4009d0:	97ffff64 	bl	400760 <printf@plt>
  4009d4:	b9402ba0 	ldr	w0, [x29, #40]
  4009d8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4009dc:	d65f03c0 	ret

00000000004009e0 <SPI_Open>:
  4009e0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4009e4:	910003fd 	mov	x29, sp
  4009e8:	b9001fbf 	str	wzr, [x29, #28]
  4009ec:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  4009f0:	91022000 	add	x0, x0, #0x88
  4009f4:	b9400000 	ldr	w0, [x0]
  4009f8:	7100001f 	cmp	w0, #0x0
  4009fc:	54000060 	b.eq	400a08 <SPI_Open+0x28>  // b.none
  400a00:	52801e20 	mov	w0, #0xf1                  	// #241
  400a04:	1400008d 	b	400c38 <SPI_Open+0x258>
  400a08:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400a0c:	9101c000 	add	x0, x0, #0x70
  400a10:	f9400000 	ldr	x0, [x0]
  400a14:	52800041 	mov	w1, #0x2                   	// #2
  400a18:	97ffff2e 	bl	4006d0 <open@plt>
  400a1c:	b9001ba0 	str	w0, [x29, #24]
  400a20:	b9401ba0 	ldr	w0, [x29, #24]
  400a24:	7100001f 	cmp	w0, #0x0
  400a28:	540000aa 	b.ge	400a3c <SPI_Open+0x5c>  // b.tcont
  400a2c:	90000000 	adrp	x0, 400000 <_init-0x680>
  400a30:	913d0000 	add	x0, x0, #0xf40
  400a34:	97ffff92 	bl	40087c <pabort>
  400a38:	14000004 	b	400a48 <SPI_Open+0x68>
  400a3c:	90000000 	adrp	x0, 400000 <_init-0x680>
  400a40:	913d6000 	add	x0, x0, #0xf58
  400a44:	97ffff47 	bl	400760 <printf@plt>
  400a48:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400a4c:	91022000 	add	x0, x0, #0x88
  400a50:	b9401ba1 	ldr	w1, [x29, #24]
  400a54:	b9000001 	str	w1, [x0]
  400a58:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400a5c:	91021000 	add	x0, x0, #0x84
  400a60:	aa0003e2 	mov	x2, x0
  400a64:	d28d6021 	mov	x1, #0x6b01                	// #27393
  400a68:	f2a80021 	movk	x1, #0x4001, lsl #16
  400a6c:	b9401ba0 	ldr	w0, [x29, #24]
  400a70:	97ffff40 	bl	400770 <ioctl@plt>
  400a74:	b9001fa0 	str	w0, [x29, #28]
  400a78:	b9401fa0 	ldr	w0, [x29, #28]
  400a7c:	3100041f 	cmn	w0, #0x1
  400a80:	54000081 	b.ne	400a90 <SPI_Open+0xb0>  // b.any
  400a84:	90000000 	adrp	x0, 400000 <_init-0x680>
  400a88:	913e0000 	add	x0, x0, #0xf80
  400a8c:	97ffff7c 	bl	40087c <pabort>
  400a90:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400a94:	91021000 	add	x0, x0, #0x84
  400a98:	aa0003e2 	mov	x2, x0
  400a9c:	d28d6021 	mov	x1, #0x6b01                	// #27393
  400aa0:	f2b00021 	movk	x1, #0x8001, lsl #16
  400aa4:	b9401ba0 	ldr	w0, [x29, #24]
  400aa8:	97ffff32 	bl	400770 <ioctl@plt>
  400aac:	b9001fa0 	str	w0, [x29, #28]
  400ab0:	b9401fa0 	ldr	w0, [x29, #28]
  400ab4:	3100041f 	cmn	w0, #0x1
  400ab8:	54000081 	b.ne	400ac8 <SPI_Open+0xe8>  // b.any
  400abc:	90000000 	adrp	x0, 400000 <_init-0x680>
  400ac0:	913e6000 	add	x0, x0, #0xf98
  400ac4:	97ffff6e 	bl	40087c <pabort>
  400ac8:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400acc:	9101e000 	add	x0, x0, #0x78
  400ad0:	aa0003e2 	mov	x2, x0
  400ad4:	d28d6061 	mov	x1, #0x6b03                	// #27395
  400ad8:	f2a80021 	movk	x1, #0x4001, lsl #16
  400adc:	b9401ba0 	ldr	w0, [x29, #24]
  400ae0:	97ffff24 	bl	400770 <ioctl@plt>
  400ae4:	b9001fa0 	str	w0, [x29, #28]
  400ae8:	b9401fa0 	ldr	w0, [x29, #28]
  400aec:	3100041f 	cmn	w0, #0x1
  400af0:	54000081 	b.ne	400b00 <SPI_Open+0x120>  // b.any
  400af4:	90000000 	adrp	x0, 400000 <_init-0x680>
  400af8:	913ec000 	add	x0, x0, #0xfb0
  400afc:	97ffff60 	bl	40087c <pabort>
  400b00:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400b04:	9101e000 	add	x0, x0, #0x78
  400b08:	aa0003e2 	mov	x2, x0
  400b0c:	d28d6061 	mov	x1, #0x6b03                	// #27395
  400b10:	f2b00021 	movk	x1, #0x8001, lsl #16
  400b14:	b9401ba0 	ldr	w0, [x29, #24]
  400b18:	97ffff16 	bl	400770 <ioctl@plt>
  400b1c:	b9001fa0 	str	w0, [x29, #28]
  400b20:	b9401fa0 	ldr	w0, [x29, #28]
  400b24:	3100041f 	cmn	w0, #0x1
  400b28:	54000081 	b.ne	400b38 <SPI_Open+0x158>  // b.any
  400b2c:	90000000 	adrp	x0, 400000 <_init-0x680>
  400b30:	913f2000 	add	x0, x0, #0xfc8
  400b34:	97ffff52 	bl	40087c <pabort>
  400b38:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400b3c:	9101f000 	add	x0, x0, #0x7c
  400b40:	aa0003e2 	mov	x2, x0
  400b44:	d28d6081 	mov	x1, #0x6b04                	// #27396
  400b48:	f2a80081 	movk	x1, #0x4004, lsl #16
  400b4c:	b9401ba0 	ldr	w0, [x29, #24]
  400b50:	97ffff08 	bl	400770 <ioctl@plt>
  400b54:	b9001fa0 	str	w0, [x29, #28]
  400b58:	b9401fa0 	ldr	w0, [x29, #28]
  400b5c:	3100041f 	cmn	w0, #0x1
  400b60:	54000081 	b.ne	400b70 <SPI_Open+0x190>  // b.any
  400b64:	90000000 	adrp	x0, 400000 <_init-0x680>
  400b68:	913f8000 	add	x0, x0, #0xfe0
  400b6c:	97ffff44 	bl	40087c <pabort>
  400b70:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400b74:	9101f000 	add	x0, x0, #0x7c
  400b78:	aa0003e2 	mov	x2, x0
  400b7c:	d28d6081 	mov	x1, #0x6b04                	// #27396
  400b80:	f2b00081 	movk	x1, #0x8004, lsl #16
  400b84:	b9401ba0 	ldr	w0, [x29, #24]
  400b88:	97fffefa 	bl	400770 <ioctl@plt>
  400b8c:	b9001fa0 	str	w0, [x29, #28]
  400b90:	b9401fa0 	ldr	w0, [x29, #28]
  400b94:	3100041f 	cmn	w0, #0x1
  400b98:	54000081 	b.ne	400ba8 <SPI_Open+0x1c8>  // b.any
  400b9c:	90000000 	adrp	x0, 400000 <_init-0x680>
  400ba0:	913fe000 	add	x0, x0, #0xff8
  400ba4:	97ffff36 	bl	40087c <pabort>
  400ba8:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400bac:	91021000 	add	x0, x0, #0x84
  400bb0:	39400000 	ldrb	w0, [x0]
  400bb4:	2a0003e1 	mov	w1, w0
  400bb8:	b0000000 	adrp	x0, 401000 <_IO_stdin_used+0x128>
  400bbc:	91004000 	add	x0, x0, #0x10
  400bc0:	97fffee8 	bl	400760 <printf@plt>
  400bc4:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400bc8:	9101e000 	add	x0, x0, #0x78
  400bcc:	39400000 	ldrb	w0, [x0]
  400bd0:	2a0003e1 	mov	w1, w0
  400bd4:	b0000000 	adrp	x0, 401000 <_IO_stdin_used+0x128>
  400bd8:	91008000 	add	x0, x0, #0x20
  400bdc:	97fffee1 	bl	400760 <printf@plt>
  400be0:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400be4:	9101f000 	add	x0, x0, #0x7c
  400be8:	b9400001 	ldr	w1, [x0]
  400bec:	5289ba60 	mov	w0, #0x4dd3                	// #19923
  400bf0:	72a20c40 	movk	w0, #0x1062, lsl #16
  400bf4:	9ba07c20 	umull	x0, w1, w0
  400bf8:	d360fc00 	lsr	x0, x0, #32
  400bfc:	53067c03 	lsr	w3, w0, #6
  400c00:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400c04:	9101f000 	add	x0, x0, #0x7c
  400c08:	b9400001 	ldr	w1, [x0]
  400c0c:	529bd060 	mov	w0, #0xde83                	// #56963
  400c10:	72a86360 	movk	w0, #0x431b, lsl #16
  400c14:	9ba07c20 	umull	x0, w1, w0
  400c18:	d360fc00 	lsr	x0, x0, #32
  400c1c:	53127c01 	lsr	w1, w0, #18
  400c20:	b0000000 	adrp	x0, 401000 <_IO_stdin_used+0x128>
  400c24:	9100e000 	add	x0, x0, #0x38
  400c28:	2a0103e2 	mov	w2, w1
  400c2c:	2a0303e1 	mov	w1, w3
  400c30:	97fffecc 	bl	400760 <printf@plt>
  400c34:	b9401fa0 	ldr	w0, [x29, #28]
  400c38:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400c3c:	d65f03c0 	ret

0000000000400c40 <SPI_Close>:
  400c40:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400c44:	910003fd 	mov	x29, sp
  400c48:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400c4c:	91022000 	add	x0, x0, #0x88
  400c50:	b9400000 	ldr	w0, [x0]
  400c54:	b9001fa0 	str	w0, [x29, #28]
  400c58:	b9401fa0 	ldr	w0, [x29, #28]
  400c5c:	7100001f 	cmp	w0, #0x0
  400c60:	54000061 	b.ne	400c6c <SPI_Close+0x2c>  // b.any
  400c64:	52800000 	mov	w0, #0x0                   	// #0
  400c68:	14000007 	b	400c84 <SPI_Close+0x44>
  400c6c:	b9401fa0 	ldr	w0, [x29, #28]
  400c70:	97fffea0 	bl	4006f0 <close@plt>
  400c74:	d0000080 	adrp	x0, 412000 <perror@GLIBC_2.17>
  400c78:	91022000 	add	x0, x0, #0x88
  400c7c:	b900001f 	str	wzr, [x0]
  400c80:	52800000 	mov	w0, #0x0                   	// #0
  400c84:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400c88:	d65f03c0 	ret

0000000000400c8c <SPI_LookBackTest>:
  400c8c:	a9bb7bfd 	stp	x29, x30, [sp, #-80]!
  400c90:	910003fd 	mov	x29, sp
  400c94:	f9000bf3 	str	x19, [sp, #16]
  400c98:	910003f0 	mov	x16, sp
  400c9c:	aa1003f3 	mov	x19, x16
  400ca0:	52800210 	mov	w16, #0x10                  	// #16
  400ca4:	b90047b0 	str	w16, [x29, #68]
  400ca8:	b98047b0 	ldrsw	x16, [x29, #68]
  400cac:	d1000610 	sub	x16, x16, #0x1
  400cb0:	f90027b0 	str	x16, [x29, #72]
  400cb4:	b98047b0 	ldrsw	x16, [x29, #68]
  400cb8:	aa1003ee 	mov	x14, x16
  400cbc:	d280000f 	mov	x15, #0x0                   	// #0
  400cc0:	d37dfdd0 	lsr	x16, x14, #61
  400cc4:	d37df1e7 	lsl	x7, x15, #3
  400cc8:	aa070207 	orr	x7, x16, x7
  400ccc:	d37df1c6 	lsl	x6, x14, #3
  400cd0:	b98047a6 	ldrsw	x6, [x29, #68]
  400cd4:	aa0603ec 	mov	x12, x6
  400cd8:	d280000d 	mov	x13, #0x0                   	// #0
  400cdc:	d37dfd86 	lsr	x6, x12, #61
  400ce0:	d37df1a5 	lsl	x5, x13, #3
  400ce4:	aa0500c5 	orr	x5, x6, x5
  400ce8:	d37df184 	lsl	x4, x12, #3
  400cec:	b98047a4 	ldrsw	x4, [x29, #68]
  400cf0:	91003c84 	add	x4, x4, #0xf
  400cf4:	d344fc84 	lsr	x4, x4, #4
  400cf8:	d37cec84 	lsl	x4, x4, #4
  400cfc:	cb2463ff 	sub	sp, sp, x4
  400d00:	910003e4 	mov	x4, sp
  400d04:	91000084 	add	x4, x4, #0x0
  400d08:	f9001ba4 	str	x4, [x29, #48]
  400d0c:	b98047a4 	ldrsw	x4, [x29, #68]
  400d10:	d1000484 	sub	x4, x4, #0x1
  400d14:	f90017a4 	str	x4, [x29, #40]
  400d18:	b98047a4 	ldrsw	x4, [x29, #68]
  400d1c:	aa0403ea 	mov	x10, x4
  400d20:	d280000b 	mov	x11, #0x0                   	// #0
  400d24:	d37dfd44 	lsr	x4, x10, #61
  400d28:	d37df163 	lsl	x3, x11, #3
  400d2c:	aa030083 	orr	x3, x4, x3
  400d30:	d37df142 	lsl	x2, x10, #3
  400d34:	b98047a2 	ldrsw	x2, [x29, #68]
  400d38:	aa0203e8 	mov	x8, x2
  400d3c:	d2800009 	mov	x9, #0x0                   	// #0
  400d40:	d37dfd02 	lsr	x2, x8, #61
  400d44:	d37df121 	lsl	x1, x9, #3
  400d48:	aa010041 	orr	x1, x2, x1
  400d4c:	d37df100 	lsl	x0, x8, #3
  400d50:	b98047a0 	ldrsw	x0, [x29, #68]
  400d54:	91003c00 	add	x0, x0, #0xf
  400d58:	d344fc00 	lsr	x0, x0, #4
  400d5c:	d37cec00 	lsl	x0, x0, #4
  400d60:	cb2063ff 	sub	sp, sp, x0
  400d64:	910003e0 	mov	x0, sp
  400d68:	91000000 	add	x0, x0, #0x0
  400d6c:	f90013a0 	str	x0, [x29, #32]
  400d70:	f94013a0 	ldr	x0, [x29, #32]
  400d74:	b98047a1 	ldrsw	x1, [x29, #68]
  400d78:	97fffe62 	bl	400700 <bzero@plt>
  400d7c:	b90043bf 	str	wzr, [x29, #64]
  400d80:	14000009 	b	400da4 <SPI_LookBackTest+0x118>
  400d84:	b94043a0 	ldr	w0, [x29, #64]
  400d88:	12001c02 	and	w2, w0, #0xff
  400d8c:	f9401ba1 	ldr	x1, [x29, #48]
  400d90:	b98043a0 	ldrsw	x0, [x29, #64]
  400d94:	38206822 	strb	w2, [x1, x0]
  400d98:	b94043a0 	ldr	w0, [x29, #64]
  400d9c:	11000400 	add	w0, w0, #0x1
  400da0:	b90043a0 	str	w0, [x29, #64]
  400da4:	b94043a1 	ldr	w1, [x29, #64]
  400da8:	b94047a0 	ldr	w0, [x29, #68]
  400dac:	6b00003f 	cmp	w1, w0
  400db0:	54fffeab 	b.lt	400d84 <SPI_LookBackTest+0xf8>  // b.tstop
  400db4:	b0000000 	adrp	x0, 401000 <_IO_stdin_used+0x128>
  400db8:	91016000 	add	x0, x0, #0x58
  400dbc:	97fffe69 	bl	400760 <printf@plt>
  400dc0:	f9401ba0 	ldr	x0, [x29, #48]
  400dc4:	f94013a1 	ldr	x1, [x29, #32]
  400dc8:	b94047a2 	ldr	w2, [x29, #68]
  400dcc:	97fffeb2 	bl	400894 <SPI_Transfer>
  400dd0:	b9003fa0 	str	w0, [x29, #60]
  400dd4:	b9403fa0 	ldr	w0, [x29, #60]
  400dd8:	7100041f 	cmp	w0, #0x1
  400ddc:	5400020d 	b.le	400e1c <SPI_LookBackTest+0x190>
  400de0:	f9401ba0 	ldr	x0, [x29, #48]
  400de4:	f94013a1 	ldr	x1, [x29, #32]
  400de8:	b94047a2 	ldr	w2, [x29, #68]
  400dec:	97fffe55 	bl	400740 <memcmp@plt>
  400df0:	b9003fa0 	str	w0, [x29, #60]
  400df4:	b9403fa0 	ldr	w0, [x29, #60]
  400df8:	7100001f 	cmp	w0, #0x0
  400dfc:	540000a0 	b.eq	400e10 <SPI_LookBackTest+0x184>  // b.none
  400e00:	b0000000 	adrp	x0, 401000 <_IO_stdin_used+0x128>
  400e04:	9101e000 	add	x0, x0, #0x78
  400e08:	97fffe56 	bl	400760 <printf@plt>
  400e0c:	14000004 	b	400e1c <SPI_LookBackTest+0x190>
  400e10:	b0000000 	adrp	x0, 401000 <_IO_stdin_used+0x128>
  400e14:	91026000 	add	x0, x0, #0x98
  400e18:	97fffe52 	bl	400760 <printf@plt>
  400e1c:	b9403fa0 	ldr	w0, [x29, #60]
  400e20:	9100027f 	mov	sp, x19
  400e24:	910003bf 	mov	sp, x29
  400e28:	f9400bf3 	ldr	x19, [sp, #16]
  400e2c:	a8c57bfd 	ldp	x29, x30, [sp], #80
  400e30:	d65f03c0 	ret

0000000000400e34 <main>:
  400e34:	d503201f 	nop
  400e38:	d65f03c0 	ret
  400e3c:	00000000 	.inst	0x00000000 ; undefined

0000000000400e40 <__libc_csu_init>:
  400e40:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400e44:	910003fd 	mov	x29, sp
  400e48:	a901d7f4 	stp	x20, x21, [sp, #24]
  400e4c:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0xff50>
  400e50:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0xff50>
  400e54:	91374294 	add	x20, x20, #0xdd0
  400e58:	913722b5 	add	x21, x21, #0xdc8
  400e5c:	a902dff6 	stp	x22, x23, [sp, #40]
  400e60:	cb150294 	sub	x20, x20, x21
  400e64:	f9001ff8 	str	x24, [sp, #56]
  400e68:	2a0003f6 	mov	w22, w0
  400e6c:	aa0103f7 	mov	x23, x1
  400e70:	9343fe94 	asr	x20, x20, #3
  400e74:	aa0203f8 	mov	x24, x2
  400e78:	97fffe02 	bl	400680 <_init>
  400e7c:	b4000194 	cbz	x20, 400eac <__libc_csu_init+0x6c>
  400e80:	f9000bb3 	str	x19, [x29, #16]
  400e84:	d2800013 	mov	x19, #0x0                   	// #0
  400e88:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400e8c:	aa1803e2 	mov	x2, x24
  400e90:	aa1703e1 	mov	x1, x23
  400e94:	2a1603e0 	mov	w0, w22
  400e98:	91000673 	add	x19, x19, #0x1
  400e9c:	d63f0060 	blr	x3
  400ea0:	eb13029f 	cmp	x20, x19
  400ea4:	54ffff21 	b.ne	400e88 <__libc_csu_init+0x48>  // b.any
  400ea8:	f9400bb3 	ldr	x19, [x29, #16]
  400eac:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400eb0:	a942dff6 	ldp	x22, x23, [sp, #40]
  400eb4:	f9401ff8 	ldr	x24, [sp, #56]
  400eb8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ebc:	d65f03c0 	ret

0000000000400ec0 <__libc_csu_fini>:
  400ec0:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400ec4 <_fini>:
  400ec4:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400ec8:	910003fd 	mov	x29, sp
  400ecc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400ed0:	d65f03c0 	ret
